Combine forces

26 October 2018

The question of which is best when considering whether to use a charge-coupled device or complementary metal oxide semiconductor sensors for imaging has long hung over the medical device community. With the ongoing development of technologies and markets, this is an evolving topic. Emma Green considers both proposals, as well as hybrid technologies, offering insight into how best to choose.

Charge-coupled devices (CCDs) and complementary metal oxide semiconductor (CMOS) imagers were developed in the late ’60s and ’70s. CCD sensors became dominant, primarily because they delivered higher-quality images with the fabrication technology available. CMOS sensors required smaller features and more uniformity than was available from silicon-wafer plants at the time. It was not until the ’90s that lithography developed to the point where designers could start making a case for CMOS sensors again.

Renewed interest in CMOS sensors occurred based on expectations of lowered power consumption, camera-on-a-chip integration, and reduced fabrication costs from the reuse of mainstream logic and memory-device fabrication. Achieving these benefits while simultaneously delivering high image quality has taken far more time, money and process adaptation than original projections suggested.

Nevertheless, CMOS imagers have joined CCDs as more mainstream, mature technology. The sensors are pixelated metal oxide semiconductors. They accumulate signal charge in each pixel proportional to the local illumination intensity, which serves a spatial sampling function. When exposure is complete, a CCD sensor sequentially transfers each pixel’s charge packet to a common output structure. This converts the charge to a voltage, buffers it and sends it off-chip. In a CMOS sensor, the charge-to-voltage conversion takes place in each pixel. The difference in read-out techniques has important implications for sensor architecture, capabilities and limitations.

Technological advances

A great deal has changed with CMOS and CCD technology since their invention. The latter sensors have undergone substantial advances in device design, materials and fabrication technology. They have also steadily increased in quantum efficiency, decreased in dark current and in pixel size, reduced their operating voltages (power dissipation) and improved their signal handling. In addition, their companion circuits have become more integrated, making CCDs easier to use and allowing quicker time to market. CCDs now yield better performance with less power and smaller systems.

In comparison, the recent progress of CMOS imager technology has been more rapid, yet more turbulent. Improving fill factor was a key determinant in driving these developments. The desire for performance and flexibility in pixel architecture in imagers competes with the amount of space in each light-sensing pixel because CMOS imagers generally require a number of optically insensitive transistors within each pixel. Advancing lithography technology, in order to improve fill factor and optical sensitivity, enhanced the ability of digital integration on the chip, as smaller transistors decrease power dissipation and the die size needed for integrated circuit functions.

Rising to the challenge

CMOS technology’s dependence on advancing lithography came at a high price, with progressively denser lithography increasing development prices, largely because of rising graticule costs at each fabrication technology node. Although smaller transistor sizes facilitate digital integration, this tends to increase design complexity faster than design productivity. This was particularly problematic for deeper submicron CMOS sensor designs, particularly those with more digitalisation.

Substantial on-chip digital integration can also bring noise-coupling issues into analogue and digital signal pathways. This conflicts with the pursuit of gaining better image quality. Design complexity, designcycle duration and noise have resulted in a lack of ability for digital integration to take full advantage of the lithographic trajectory of CMOS imagers. A more significant challenge of the deep-submicron design in CMOS sensors is the analogue portion of the integrated circuit. As microelectronic-fabrication technology becomes denser, analogue circuit performance typically suffers. Declining linearity and dynamic range combine to reduce the accuracy of analogue circuitry. Other performance complications, such as leakage current and complementary circuit-matching issues, can also arise with increasingly dense fabrication technologies.

Addressing the decline of analogue performance in deep-submicron CMOS required a significant shift in sensor and circuit design. The technology shifted to digitally assisted analogue design, which repartitions analogue and mixed-signal circuit functions, so accuracy and some speed demands of traditional analogue circuit elements are offloaded to digital circuit blocks; however, as a result of the limited relevant precedents for such highperformance digitally assisted circuit design from other applications, it has taken several years to develop digitally assisted analogue architectures that fully embrace all of the competing forces among design, electro-optical performance and fabrication of CMOS.

High performance

There is a vibrant industry for CMOS and CCD sensors. Structural changes in the technology and business environment mean that a new framework exists for considering the relative strengths and opportunities of CMOS and CCD imaging technology. Both can offer excellent performance when designed properly. Traditionally, CCDs have provided the performance benchmarks in medical imaging and other applications that demand the highest image quality. CMOS imagers offer more integration and functions on the chip, lower power dissipation at the chip level and the possibility of smaller system size. They have, however, often required trade-offs between image quality and device cost.

Today, there is greater overlap with the types of applications that each imager can serve. CMOS designers have made a strong effort towards achieving high image quality, while CCD designers have lowered their power requirements and pixel sizes. This means that both imagers are now used in high-performance professional and industrial cameras, thus contradicting the early stereotypes.

Costs are similar at the chip level. Early CMOS proponents claimed CMOS imagers would be much cheaper because of being able to be produced on the same high-volume wafer-processing lines as mainstream logic or memory chips. This has not been the case. The requirements for high imaging performance have required CMOS designers to iteratively develop specialised, optimised, lowervolume mixed-signal fabrication processes, similar to those used for CCDs. Achieving these processes at increasingly smaller lithography nodes has not only been slow, but also expensive.

The larger issue around pricing is sustainability. As many CMOS start -ups pursued high-volume, commodity applications from a small base of business, they priced below costs to win business. For some, the risk paid off and their volumes allowed sufficient margins for viability. Others had to raise their prices, while others went out of business. Although cost advantages have been difficult to realise and on-chip integration has been slow to arrive, speed is a key area where CMOS imagers demonstrate considerable strength because of the relative ease of parallel output structures. This gives them great potential for medical device imaging.

Getting scientific

In 2008, following a combined development between Andor Technology, Fairchild Imaging and PCO, hybrid sensors, termed scientific complementary metal oxide semiconductors (sCMOSs), were introduced, which use a combination of CCD and CMOS architecture. These sensors deliver high sensitivity, fast readout speeds and low noise levels. They have pixels composed of a photodiode and an amplifier that converts charge into voltage. The voltage of each pixel is output by turning on the switch one by one, and the data of each horizontal line is read by the on-chip column amplifier and A/D in parallel. This results in fast read-out speed while keeping its noise level low. For these reasons, a sCMOS is suitable for highfidelity, quantitative scientific measurement and low-light-level conditions.

Hybrid sensors were developed to harness the benefits of CCD and CMOS imagers, and have a number of valuable applications. Derek Toomre, professor of cell biology at the Yale School of Medicine, US, has been researching neo cameras that use sCMOS, which enable users to see cells in a new light with sensitive imaging at speeds not achieved by older technologies.

“These scientific CMOS cameras are not a small step, but a quantum leap that will open up new possibilities of what can be studied in fast cellular processes, rapid screening and super-resolution imaging,” he says.

Increasingly, sCMOSs are being used within biological and material sciences, as well as astronomy. Despite their popularity, the downside with these sensors is the pixel-dependent noise they introduce. Sheng Liu and Fang Huan are two researchers at Purdue University’s Weldon School of Biomedical Engineering, US, who developed a new algorithm that corrects the noise. This prevents each pixel fluctuating at its own rate, which is problematic when studying photons. “When you are trying to use this for biological studies, it’s difficult to determine whether this fluctuation comes from the sample (photons) or from the camera itself,” says Liu.

If left uncorrected, this sCMOS-specific noise generates imaging artefacts and biases in quantification. Until recently, a correction was applied based on a suite of algorithms, but this only worked on images with point objects, such as in particle tracking or single molecule switching nanoscopy.

“We have been trying to use this camera for live-cell, single-molecule, super-resolution imaging and introduced an algorithm for that purpose in 2013,” Huang says. “However, the previous algorithm only works for single-molecule studies, which means all your objects have to be so-called ‘point emitters’. So, basically, your images must look like stars in the sky.”

When discussing the challenges this work involves, Huang adds, “The fundamental challenge is to estimate one of the variables when you know the sum of two variables. There’s no unique answer to this question, but we want to make the best estimate given our additional knowledge of the two variables. We exploited a general property of imaging systems, the optical transfer function. Based on our knowledge of how each of the four million pixels on our camera chip behaves, we are able to estimate the actual photon level at each pixel location.”

This development is particularly significant because it allows sCMOS to have a much wider range of uses within imaging. “This is exciting for us because this allows CMOS sensors to be used in a broad spectrum of imaging methods for quantitative biomedical and biological studies, improving their sensitivity, field of view and imaging speed,” Huang states.

The research’s benefits extend beyond the medical imaging space. “Scientific sCMOS cameras are rapidly gaining popularity in biological sciences, material sciences and astronomy,” concludes Huang. “The sensor provides significant advances in imaging speed, sensitivity and field of view compared with traditional detectors, such as charge-coupled devices or electron multiplying CCD.”

Digital photograph of a CCD linear image sensor for industrial application manufactured by Hamamatsu Photonics.
Image detection and processing in a CCD using metallic electrodes.
An application-specific CCD for ultraviolet (UV) imaging in wire-bonded package.

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